Chord Signaling

Communication of data on electrical wires between chips is fast gaining prominence in the electronics industry.

Because most of the components of the transmitter and the receiver of such links are analog, rather than digital, they don’t benefit as much from Moore’s law.

On the other hand, the need to transmit data ever-faster calls for higher rates of transmission over existing electrical wires. Since, in this type of communication, noise is highly frequency dependent, higher transmission rates lead to much higher noise, and therefore a much higher growth of power consumption than linear. The industry has long recognised this problem as the 'Interconnect bottleneck'. Fundamental solutions to this important problem have remained elusive, however.

A look at the capacity of these channels reveals that today we are only transmitting at anywhere between 1 per cent to 4 per cent of the capacity. Therefore, at least on the surface, there is a lot to be gained by applying methods from communication theory to this problem.

However, unlike many other systems such as wireless, DSL, satellite, or optical communication, the constraints on the chip-to-chip communication system are very different: transmission rates are typically 1000 times those encountered in wireless communication.

On the other hand, the energy consumed for the transmission and recovery of each bit is about 1000 times less than what is customary in wireless. Also, latency requirements are extremely stringent, allowing only latencies up to very few nanoseconds. Therefore, it is not possible to use fancy processing methods.

In this talk I will introduce a new modulation scheme for chip-to-chip communication which we call 'chordal codes'. These codes are somewhat reminiscent of spatial MIMO systems, and provide a first step towards a better utilisation of the available communication bandwidth between chips. Current implementations of systems based on these codes show a large reduction of total power of the communication PHY and a large increase of the communication speed compared to other classical systems.

Virtual tea: There will be a 30-minute virtual tea directly after the seminar.

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About the speaker

Amin Shokrollahi finished his PhD at the University of Bonn in 1991 where he was an assistant professor until 1995. From 1995 to 1998 he was at the International Computer Science Institute in Berkeley. In 1998, he joined the Bell Laboratories as a Member of the Technical Staff. From 2000 to 2009 he was the Chief Scientist of Digital Fountain. In 2003, he joined EPFL as a full professor of Mathematics and Computer Science. In 2011, he founded the company Kandou Bus which designs fast and energy efficient chip-to-chip links.

Dr Shokrollahi’s research covers a wide range of topics, from pure mathematics to electronics. He has 200+ publications, and 150+ pending and granted patent applications. An IEEE Fellow, Dr Shokrollahi’s honors include several IEEE Paper Awards, the IEEE Eric E Sumner Award, the Advanced Research Grant of the ERC, the IEEE Hamming Medal, the Mustafa Prize, and the ISSCC Jan van Vessem Award for outstanding European paper.